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March 17, 1997

Hitachi, Ltd. has developed the HM5283206FP-8 8M-bit synchronous graphic RAM (SGRAM), offering an operating speed of 125 MHz, as high-speed image processing memory for use in PCs, engineering workstations, TV game players, and similar devices. In Japan, sample shipments will begin in July. The new SGRAM offers high data transfer speed of 500 Mbytes per second, enabling a data transfer speed of 1 Gbyte per second to be achieved in combination with a 64-bit graphic controller used as standard with current PCs.

In PCs, TV game players, and similar devices, SGRAM temporarily stores graphic data before it is displayed on the screen, and is used as high-speed work memory when the CPU is performing computations on large amounts of data for 3-D image processing. Hitachi produces 8- Mbit SGRAMs with 83 MHz and 100 MHz clock rates, mainly for use in PC graphic systems for 2-D image processing. While 83 MHz products are currently the mainstream, the past six months have seen a swing toward 100 MHz models. These days, however, the 3-D image processing technology which was adopted early on by the TV game industry, as well as moving picture technologies such as MPEG(*1), are being provided in PC graphic systems targeting Internet-related applications. As a result, more emphasis is being placed on SGRAM as work memory for image processing LSIs, and there is a demand for greater performance to match the constant increases in CPU power.

To meet this need for greater speed, Hitachi has developed the HM5283206 FP-8 8M-bit SGRAM capable of 125 MHz operation. The new SGRAM achieves high-speed operation on a 125 MHz clock through the use of a 0.5 micron shrink process and 3-stage pipelining. This has improved the data transfer rate to 500 Mbytes per second, up from the 400 Mbytes per second of 100 MHz products. Using the new SGRAM in conjunction with a 64-bit graphic controller, the current PC standard,enables a data transfer speed of 1 Gbyte per second to be attained.

Built-in drawing functions include block write(*2) and mask write(*3) functions, previously associated with video RAM, as in 100 MHz products. With the block write function, data set beforehand in a 32- bit internal register is written to memory in 8-column units. This function allows high-speed drawing, at 2.0 Gbytes per second, in routine tasks such as screen background painting. In addition, the two-bank internal configuration greatly improves data transfer efficiency by eliminating the need to interrupt data transfer in order to carry out precharging. The memory configuration is 128 k x 32 bits x 2 banks. The package is the same 100-pin QFP as is used for 100 MHz products. Future development plans include a 16-Mbit SGRAM with a x 32 configuration for notebook PCs and high-end graphic systems that require large amounts of graphic memory.

Notes:

1. MPEG (Moving Picture Experts Group)
International standard for moving picture compression expansion technology.

2. Block write
A function that enables block writing of information held in a color register, simplifying drawing and display control by performing high-speed screen clearing, painting, etc.

3. Mask write
A function characteristic of VRAM that enables writing to be masked bit by bit.
Used in conjunction with the block write function to perform fast color conversion.

Applications:

- Graphic display memory for personal computers and workstations
- Graphic display memory or main memory for video game players and mobile computers

Pricing in Japan

Catalog No.	Sample Price	Cycle Time
HM5283206FP-8	2,000 yen	8 ns

Features:

1. 125 MHz operation and high-speed data transfer
Achieves an operating speed of 125 MHz. Operation on a fast clock enables a high data transfer speed of 500 Mbytes per second to be attained. 1-Gbyte/second data transfer is possible in conjunction with a 64-bit graphic controller.

2. Built-in high-speed graphic drawing functions
Block write and mask write functions enable screen erasing and painting to be performed at four times the normal speed (2.0 Gbytes/second).

3. Two-bank configuration
Eliminates data transfer interruptions due to precharging.

4. Other features
Conforms to JEDEC standards.

Specifications

Item			Specifications
Configuration			128 k x 32 x 2 banks
Process			0.5 micrometer CMOS shrink process
Power supply voltage			3.3+/- 0.3V
Maximum operating frequency			125 MHz
Access time	RAS		46.5 ns
	CAS		22.5 ns
	CLOCK	CL=1	22 ns
		CL=2	10 ns
		CL=3	6.5 ns
Burst length			1/2/4/8/full page
Burst type			Sequential/interleaved
CAS latency			1/2/3
Functions			Auto-precharge
			Single write
			Burst stop
			Self-refresh
			Byte control
			Block write
			Mask write
Interface level			LVTTL (low-voltage TTL)
Package			100-pin QFP (0.65 mm pin pitch)

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