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News Release

July 13, 1998

Hitachi Releases 256-Mbit Synchronous DRAMs and the Industry's Highest Density 1-GB Synchronous DRAM Module

- About 1/3 the power consumption of four 64-Mbit synchronous DRAMs -

Hitachi, Ltd.(NYSE:HIT) today announced the release of three 256-Mbit synchronous DRAMs (SDRAMs). The HM5225165ATT series (with a 16-bit organization), the HM5225805ATT series (with an 8-bit organization), and the HM5225405ATT series (with a 4-bit organization), are designed for use as main memory in servers and workstations. Sample shipments will begin in August 1998 in Japan. These SDRAMs are provided in the same 400-mil package as 64-Mbit SDRAMs, and have about 1/3 the power consumption of four of Hitachi's 64-Mbit SDRAMs.

Hitachi also announced the release of two memory modules based on these SDRAMs. The HB52E649E1 series is a 512-MB 168-pin DIMM, and has a 72-bit organization with resister. The HB52R1289E2 series is the industry's highest density 1-GB 168-pin DIMM, and has a 72-bit organization with resister. Sample shipments of the HB52E649E1 series will begin in September 1998 in Japan and sample shipment of the HB52R1289E2 series will begin in November 1998 in Japan.

One aspect of the recent increased performance of workstations, servers, and other information-processing equipment has been an increase in the density of memory. But it is now impossible to develop a 512-MB SDRAM module in the same module size as existing modules by using 64-Mbit SDRAM.

So Hitachi has developed the three 256-Mbit SDRAMs. By using a 0.2-micrometers CMOS fabrication process, the HM5225165ATT series, the HM5225805ATT series, and the HM5225405 ATT series achieve 256-Mbit SDRAMs, quadruple the memory density of a 64-Mbit SDRAM in the same package, 54-pin 400-mil TSOP-II, as the 64-Mbit SDRAM.

These new products reduce the burst current (Icc4) of 360mA in the case of four 64-Mbit SDRAMs with a 4-bit organization to 110mA in a 16-bit organization. The HM5225165ATT series has a 4-Mword x 16-bit x 4-bank organization, the HM5225805ATT series has a 8-Mword x 8-bit x 4-bank organization, and the HM5225405ATT series has a 16-Mword x 4-bit x 4-bank organization.

The memory modules also being released use these SDRAMs and 168-pin DIMMs (Dual In-line Memory Modules) that support 100-MHz memory bus systems. The products of this release are the HB52E649E1 series 512-MB SDRAM modules and the HB52R1289E2 series 1-GB SDRAM modules. Hitachi realizes the industry's highest density 1-GB SDRAM modules by using stacked TCP mounting technology in which TCP packages are stacked in two layers.

The HB52E649E1 series has a 64-Mword x 72-bit x 1-bank organization to support ECC*. This module uses eighteen of the HM5225405ATT 4-bit organization SDRAM chips on the printed circuit board. The HB52R1289E2 series has a 64-Mword x 72-bit x 2-bank organization to support ECC. This module uses thirty-six of the HM 5225405ATB(TCP) 4-bit organization SDRAM chips on the printed circuit board.

Note *ECC (error checking and correction): Functions that both check for errors that occur in memory data and correct those errors.

Application Product Examples
Main memory in servers, workstations, and other computer systems

Sample pricing in Japan (Yen)

  • 256-Mbit Synchronous DRAMs
Catalog No. Organization Sample price (as of August 1998)
HM5225165ATT-A6 4M x 16 bits x 4 banks 36,000
HM5225805ATT-A6 8M x 8 bits x 4 banks 36,000
HM5225405ATT-A6 6M x 4 bits x 4 banks 36,000

  • Synchronous DRAM Modules
Catalog No. Organization Sample price (as of November 1998)
HB52E 649E1-A6A 64M x 72bit 380,000
HB52R1289E2-A6A 128M x 72bit 1,100,000

Specifications 1. 256-Mbit Synchronous DRAM
Item HM5225165ATT-A6 HM5225805ATT-A6 HM5225405ATT-A6
Memory organization 4 Mword x 16 bits x 4 banks 8 Mwords x 8 bits x 4 banks 16 Mwords x 4 bits x 4 banks
External power- supply voltage 3.3 V +/- 0.3 V
High-speed modes Burst data transfers with burst lengths of 1, 2, 4, 8, or full.
Clock frequency 100 MHz
Access time (tAC) CL=2 6ns
CL=3 6ns
Setup and hold times 2ns / 1ns
Current drain (Icc4) CL=2/3 110mA 100mA 90mA
Functions Burst stop
Burst read
Single write
Auto precharge
Clock suspend
DQM control
Self/auto-refresh
Process 0.20-micrometers CMOS process
Package 54-pin 400-mil TSOP-II

2. Synchronous DRAM Modules
Item HB52E649E1-A6A HB52R1289E2-A6A
Memory organization 64 Mwords x 72 bits 128 Mwords x 72 bits
External power- supply voltage 3.3V +/- 0.3V
High-speed modes Burst data transfers with burst lengths of 1, 2, 4, 8, or full.
Clock frequency 100MHz
Access time (tAC) CL=2 6.9ns
CL=3 6.9ns
Setup and hold times 2ns / 1ns
Functions Burst stop
Burst read
Single write
Auto precharge
Clock suspend
DQM control
Self/auto precharge
Package 168-pin DIMM
(Dual Inline Memory Module)
133.37 x 43.18 x 4.00 mm 133.37 x 38.1 x 4.00 mm
Buffer PLL+Resister type


WRITTEN BY Secretary's Office
All Rights Reserved, Copyright (C) 1998, Hitachi, Ltd.