August 31, 1998
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Notes: |
1. |
F-ZTAT (Flexible Zero Turn-Around Time) is a trademark of Hitachi, Ltd. |
2. |
PLL oscillation circuit: Phase-locked loop oscillation circuit |
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3. |
DTC (data transfer controller): The DTC is started by an interrupt, and can perform data transfer instead of the CPU. Transfer information is located in on-chip RAM, enabling a greater number of channels to be used. |
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4. |
I2C bus interface: Philips serial bus interface |
Sample prices in Japan
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H8S/2633F |
HD64F2633F |
QFP-128 |
2,400 |
HD64F2633TE |
TQFP-120 |
2,600 |
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H8S/2238F |
HD64F2238F |
QFP-100 (14 x 14) |
2,200 |
HD64F2238FA |
QFP-100 (14 x 14) |
2,200 |
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HD64F2238TE |
TQFP-100 (14 x 14) |
2,400 |
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HD64F2238TF |
TQFP-100 (12 x 12) |
2,400 |
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H8S/2338F |
HD64F2338F |
QFP-144 |
2,400 |
Features
1. |
0.35 micrometers process, large on-chip memory |
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2. |
Low noise and low power consumption achieved through provision of on-chip PLL oscillation circuit and 32 kHz oscillation circuit |
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3. |
Variety of peripheral circuits provided through use of 0.35 micrometers process |
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4. |
High-speed operation |
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5. |
Comprehensive on-chip peripheral functions |
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Development Environment
The existing H8 series C compiler, assembler, linkage editor, librarian, simulators, debuggers, etc., can be used asthe user software development environment on widely used personal computers and workstations. In addition, a variety of emulators, including the E6000 realtime simulator, are available as hardware support tools.
Specifications
Item H8S/2633F H8S/2238F H8S/2338F Maximum operating frequency 25MHz 13MHz 20MHz CPU (minimum instruction execution time) 40ns 77ns 50ns ROM 256-kbyte flash memory 256-kbyte flash memory 256-kbyte flash memory RAM 16 kbytes 16 kbytes 8 kbytes Bus controller CS signal output CS signal output CS signal output PC break controller Two channels on-chip Two channels on-chip - DMA controller Short address mode: - Short address mode: Full address mode: - Full address mode: Data transfer controller(DTC) Internal interrupt/software-activated transfer Timers 16-bit timer x 6 channels 8-bit timer x 4 channels 8-bit timer x 2 channels 8-bit timer x 2 channels Watchdog timer (WDT) x 2 channels Watchdog timer (WDT) Serial communication interface Asynchronous/Synchronous x 5 channels Asynchronous/Synchronous x 4 channels Asynchronous/Synchronous x 3 channels A/D converter 10 bits x 16 channels 10 bits x 8 channels 10 bits x 12 channels D/A converter 8 bits x 4 channels 8 bits x 2 channels 8 bits x 4 channels Interrupt controller 8 priority levels, 9 external interrupt pins Power-down features Medium-speed mode Sleep mode Module stop mode Software standby mode Hardware standby mode Subclock operation Subclock operation - I/O ports 77 I/O pins, 8 input pins 72 I/O pins, 10 input pins 106 I/O pins, 12 input pins Packages 120-pin plastic TQFP 100-pin plastic TQFP 144-pin plastic QFP 100-pin plastic QFP (14 mm x 20 mm, 0.65 mm pin
pitch) 128-pin plastic QFP 100-pin plastic QFP 100-pin plastic
(3.0 V to 3.6 V)
(2.7 V to 3.6 V)
(2.7 V to 3.6 V)
Burst ROM interface
DRAM interface
Burst ROM interface
Burst ROM interface
DRAM interface
4 channels
4 channels
2 channels
2 channels
85 channels
(One channel usable as realtime clock timer)
(14 mm x 14 mm, 0.4 mm pin pitch)
(14 mm x 14 mm, 0.5 mm pin pitch)
(20 mm x 20 mm, 0.5 mm pin pitch)
(14 mm x 20 mm, 0.5 mm pin pitch)
(14 mm x 14 mm, 0.5 mm pin pitch)
TQFP
(12 mm x 12 mm, 0.4 mm pin pitch)