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July 27, 2000 |
Hitachi Releases HG76C Series of Low-Power, High-Integration Custom LSIs - Use of SOCplanner system LSI platform for shorter development times - |
Hitachi, Ltd. (TSE: 6501) today announced the HG76C Series of custom LSIs achieving low power consumption at a low voltage, for use in portable information terminals, digital consumer products, and so forth. Hitachi will begin accepting orders this onth in Japan. The HG76C Series offers lower power consumption and standby current than previous Hitachi products, and features major improvements in the level of integration and operating frequency. In addition, as the first custom LSIs to use Hitachi's SOCplanner system LSI platform, this series initiates an open approach toward platform users. This will allow users to carry out thoroughgoing custom LSI development in a short time-frame with the "One Pass" design method that eliminates retrogression from downstream to upstream design processes, using the same SOCplanner platform as Hitachi designers. Hitachi has previously released the HG73C Series and the high-integration, low-power HG75C Series as custom LSIs, incorporating a CPU core, memory, analog modules, and so forth, to meet a variety of needs. Now, with further advances in low-power-consumption and low-standby-current technologies, the HG76C Series is being released to meet the need for large-scale, complex system LSIs. This new series is designed to achieve lower power consumption and lower voltage in systems such as portable information terminals and digital consumer devices. The core power supply uses low voltages of 1.8 V and 1.5 V, and power consumption (0.02 ¦ÌW/MHz/gate at 1.5 V operation) is only half that of Hitachi's HG75C Series. A Vbb (back bias voltage) power supply is also included, providing low power consumption in standby mode by means of Vbb control. The HG76C Series also offers highly integrated logic with a trebled integration level (90 kgates/mm2), large-capacity memory with a doubled integration level (150 kbits/mm2), and a 50% increase in operating frequency (600 MHz). The memory lineup comprises fixed large-capacity SRAM modules (max. 2 Mbits/module) and compiled SRAM (with easily changeable bit and word lengths). Design is carried out in a SOCplanner-based design environment, with Cadence's Verilog-XL(TM) and NC-Verilog(TM)*1, and Synopsys's VCS(TM) (V4)*2 supported as sign-off tools. In the future, Hitachi plans to provide highly integrated cells offering a further 30% increase in integration level, as well as IPs and cores including a high-speed (80 MHz), high-precision (16-bit) ADC/DAC, a low-power, high-speed SH2-DSP core, and USB function, USB host, IEEE1394, Ethernet controller, JPEG, MPEG, and encryption module IPs. Notes: 1.Verilog-XL and NC-Verilog are trademarks of Cadence Design Systems, Inc., of the USA. 2.VCS is a trademark of Synopsys, Inc., of the USA.
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WRITTEN BY Corporate Communications Division (C) Hitachi, Ltd. 2000. All rights reserved. |