June 10, 2014
Enhancing IT system energy efficiency by optimizing LSI supply voltage for tolerable error rate of processing applications
Hitachi, Ltd. today announced the development of technology to enhance the energy efficiency of IT systems by optimizing the supply voltage of incorporated LSIs in accordance with the error rate tolerable in computational results for a given application.
Conventional IT systems have been designed so that, regardless of installed applications, the error rates are set at almost zero. Through simulations, Hitachi discovered that by just tolerating image noise at a level unnoticeable by humans, it is possible to reduce the energy consumption of the entire system by 19%.
The technology developed proposes a new design method for IT systems incorporating tolerable error rates of applications as a new parameter. While some applications demand an error rate to be as near to zero as possible, there are many other applications that in practicality tolerate a value of 0.1% or 1%. In an era where the issue of rising characteristic variations of LSIs due to device scaling is becoming a reality, this technology enables a significant decrease in energy consumption of IT systems.
