CMOS Annealing Machine – developed through multi-disciplinary cooperation

Before talking about how I got involved in developing CMOS annealing machines, I would like to brief you about my background. I majored in semiconductor circuit design in my university days and continued to focus on it about 15 years after joining Hitachi. You could say that I am a semiconductor circuit designer through and through. At the time, celebrated semiconductor circuit designer Dr. NAGATA Minoru was with Hitachi. Despite having retired, he still visits academic conferences from time to time. In recent years, technological development has become nearly impossible for a single human to accomplish, but we are extremely thankful that he is still able to offer many insights informed by experience.

For two years from 2010 to 2012, I was involved in a joint development project with IBM and spent my time at the Watson Research Center in Yorktown Heights, New York. However, when I returned to Japan, I needed to distance myself from semiconductor R&D as semiconductor research needed to downsize because of changes in the organizational structure. This became a large opportunity for me to begin searching for a field other than semiconductors where I could work long-term. In all likelihood, computers will not go away in the future. But what kind of direction should they develop in? Thinking about this topic, I started to reason with my friends.

I thought that the shapes of computers might change when we arrive at the limits of integration and Moore’s law reaches a dead end. Then, how will computers change in the future? For about a year, various members inside our research lab debated how computers might change in the future. While there were about 10 people on the whole team, there were two or three core members who thought about this topic.

Dr. YANO Kazuo, who promotes AI and Happiness Planet as of recent, was my superior when I was researching semiconductor circuits. Dr. Yano had a strong will to change Hitachi and himself a step ahead of everyone else and had started conducting research in fields other than semiconductors early on. About 10 years later, after I lost all ties with semiconductors, I finally started thinking about the future of computers.

There were semiconductor engineers, computer hardware engineers and software engineers on the team that had discussions about the future of computers. The fact that we were able to continually have discussions with quantum computer researchers at Hitachi Cambridge Laboratory (HCL) of the U.K. also provided stimulus. I believe we arrived at the CMOS annealing method precisely because discussions took place among engineers from differing fields. Instead of only having discussions with people from one field, it is truly enjoyable to bounce ideas off of people from various backgrounds.

It was around that time that an overseas company announced the quantum computer. However, we had no thought of creating this. Keeping the quantum computer’s quantum annealing technology in our mind, one computer engineer said, "Isn’t there a better way to do this?" As a semiconductor engineer, I said, "Semiconductors could handle this." That is how the invention of CMOS annealing began. If it were only up to semiconductor engineers, I do not think this technology could have been realized.

I would like to explain why this technology is called annealing. Annealing is a method of removing distortions on the inside of iron and steel to manufacture sturdy iron and steel. For example, slowly cooling iron or steel after heating it at high temperatures is one way to anneal. For this new computer technology, this model is used as a method to determine the optimal parameters. If we explain the optimization method by using the example of annealing, by increasing the energy (heating), thus randomizing the series, and slowly cooling it from that state, we are able to naturally discover the optimal state. It is for this reason that we use the word annealing.

Quantum annealing uses quantum effects by placing a transverse field to determine the optimum solution, gradually weakening it, and searching for the optimum position. It is called annealing because its process is similar to the manufacturing process called annealing. While CMOS annealing does not utilize this kind of quantum effect, it searches for the optimum position from various search areas upon eliminating sections where the desired answer will not be found but where it is probable to come to a halt. In other words, it frequently breaks down states at random to find stable solutions and realizes the annealing effects of slowly cooling high temperatures by decreasing this frequency, eventually stabilizing a state that does not need to be broken down.

The purpose of annealing is to discover optimum solutions or parameters. However, in reality, we sometimes do not know if it is truly the optimal parameter. In principle, in order to find the true optimal point, it is said that an infinite amount of time must be spent. Thus, if the same amount of time is spent on solutions, quantum annealing should find a point closer to the optimal point than CMOS annealing.

However, when we thought of potential application examples where optimization processing would actually be utilized, we opined that there must be a vast number of areas where it could be applied, even if the optimal point was not found. This is why we believe CMOS annealing is useful. To put it crudely (although I may be scolded by mathematicians), if we can find solutions that can be used in real life, even if the answers are not mathematically exact, it should not matter to engineers or practical users.

Next, I will explain how we utilized the CMOS semiconductor circuits and characteristics to design the CMOS annealing machine. Because I have long been in charge of memory within semiconductor circuits, as soon as I understood the basics and models of quantum annealing machines, I knew that we could realize it with a memory circuit. I thought that we could create an annealing machine by integrating a digital circuit to the CMOS memory circuit.

First, we confirmed if the idea "utilizing memory" could be used through computer simulations. We then trial manufactured a 20,000-bit circuit integrated with semiconductor chips and announced it at the 2015 IInternational Solid-State Circuits Conference (ISSCC), known as the Olympics of semiconductors. This is the largest annealing chip to date.

Simultaneous to the announcement at ISSCC, we conducted an official news release and this was taken up by the media, becoming a hot topic beyond the expectations of anyone in or outside of the company. As quantum computers only started appearing around 2014, I think the fact that not much time had passed led to the strong response.

We actually did not consider using machine learning or deep learning very much. This is because there is already research on how neural network learning works, and because we had a stronger desire to develop a computer with a different method. I believe we were particular about changing computer architecture. This was around the time when Hitachi started saying the words, "Social Innovation," while everyone else was researching artificial intelligence (AI). We had a strong sentiment believing that approaches that are not gathering much attention yet will receive extra focus in the future.

CMOS annealing machines are not well suited to deep learning. While there is a chance that the CMOS annealing machine could be used to optimize a portion of machine learning, the CMOS annealing machine is best suited to solve optimization problems. Of course, there is a need to solve optimization problems in machine learning, so it could be used for that portion. However, its purpose is fundamentally different than AI’s.

AI is best used for finding out what to do next based on learning from massive quantities of data, while annealing machines are used to discover optimal parameters from existing data. That is, it finds the optimal option when situations change. In order to learn and make inferences, AI requires massive quantities of past data. AI is a technology that is superior at deducing optimal routes from past data. When applied to road conditions, if there are examples of information about road congestion, and there are ample cases where a road congests at a given time on a given day of the week, AI would be able to avoid that road. However, AI is not capable of responding to cases when a road is suddenly blocked off due to an accident or a disaster. It is difficult for AI to find a solution to congested roads when the road has never been congested before.

In contrast to this, annealing machines cannot make predictions because they do not learn. However, it is the annealing machine that is able to find the current optimal route when you want to find a detour due to traffic congestion. Annealing machines can come up with the optimal route if you suddenly encounter an accident. They can find the optimal route again if the traffic situation changes 10 minutes later. Annealing machines specialize in finding the optimal option under the current situation. If you would like suggestions about optimal routes when a situation has just changed, we would love it if you would leave it to us.

At first, we had some trouble working together with researchers from other fields. This is because we used different jargon and had different presumptions.

For example, while semiconductor engineers would develop conversations with the presumption that there are differences in semiconductor memories, computer engineers would think that memory naturally appears as either 1s or 0s. Or, when the phrase "semiconductor chip" is used, semiconductor engineers will first imagine a silicon chip, think of packaging it, and will finally imagine how a terminal might be attached and how the IC would be mounted on the board, while computer engineers would simply imagine a product that is inside a package.

Moreover, our imagination of the word "software" itself differed. On the one hand, semiconductor circuit engineers have this idea that software that develops programs does things automatically. On the other hand, computer engineers actively think of how they might cut the software and where they would create a software interface. Besides, they thought that it was important to be aware of the interface, even among the software, as software has a stratum structure with OS, middleware, and application.

The word "application" itself had different connotations, where semiconductor engineers would imagine applied equipment, computer engineers would think of application software.

Accordingly, we sometimes did not understand the words that our partners were using, while words that we took for granted were not communicated well to our partners.

We needed to have clear discussions. We needed to learn together and learn from each other to overcome this problem. We actively hold study groups inside our research lab. Our partners would talk about their technologies one week, and on the next week, we would talk about our own technologies. In regular meetings, people often just talk about progress reports about projects, but with this, our respective understanding would not deepen. Because of this, we were intentional about explaining our technologies to each other.

For example, if we were to have two meetings in a week, one would be a progress report, while the other would be for explaining and understanding different technologies. We also would talk about things that we were having difficulty in. I believe the frequency at which we had meetings where we would show each other our technologies were higher than any other research group. We had multiple heated debates where others might think that we were fighting face-to-face. Even the younger researchers would join in on these heated discussions. I have heard that they have continued to have round-table discussions to deepen their knowledge.

At a basic level, we often place more importance on actual meetings, but there are times where having meetings online is more efficient with members who are far away, so long as you have had some form of initial contact. While I am often based at a research lab in Kokubunji City, Tokyo, I have relations with the Hitachi Hokkaido University Laboratory, and I also work as a visiting professor at the Research Institute for Electronic Science at Hokkaido University. For this reason, I often conducted meetings online with team members at the Hitachi Hokkaido University Laboratory. I often work with Professor KOMATSUZAKI Tamiki who conducts research in the data mathematical systems field at the Hitachi Hokkaido University Laboratory. Dr. KOMATSUZAKI truly has an open mind and has helped spread our research to various places. Because Hitachi wanted to start working in new areas in mathematics, we started joint research with Dr. KOMATSUZAKI who has experience in chemistry and mathematics. However, currently, not only do we work on mathematics, but we also work together on informatics, which has stretched our realm of collaboration. Although we did not even imagine this at first, by creating a base at Hokkaido University, we were able to create a large network of contacts inside Hokkaido University.

However, even when we conducted joint developments with Hokkaido University, our jargon was different. While we were not precise in how we approached mathematical formulas, mathematicians pay particular attention to defining equations. This gap was rather large. Fortunately, however, we had a "translator." This man was originally a researcher at Hokkaido University, who had returned to Hokkaido University after conducting research at Hitachi for about a year. When Hitachi’s researchers would establish a mathematical formula, he would confirm the stringency of the equation, smoothly mediating with Hokkaido University. This was extremely helpful.

When the elements are connected all across the entire device (complete union type) the benefit is that information is easily integrated. While this may make it easy to use at first, for Hitachi’s CMOS annealing machine, we decided to focus on only connecting elements near each other. This is because if all the elements are unified, there is a chance that it cannot be expanded. That is, we decided to focus on the expansion capacity in our development to expand the size of the computer in the future. The reason why we focused on upscaling was because as the scale of optimization problems increase, current computers will have difficulty solving the problems. This is why we focused on expansion capacity allowing for upscaling. In order to solve increasingly large societal issues, we aimed to create something that could be expanded as much as we need in the future.

The choice to make the machine as large as possible was made through discussions amongst computer and semiconductor engineers. In the development stage, some people were firmly of the opinion that the machine would be difficult to use if it was not a complete union type. However, this would make it difficult to mount on the hardware and we had concerns that this would eliminate our machine’s strongest point. In debating the type of the machine, as for the complete union type, we decided to make the software and then cover it so that the software could be mounted onto Hitachi’s machines. This is because one of the great characteristics of Hitachi’s machines is that they can be made larger if connected. In contrast, the ability to connect would also be of benefit for quantum annealing. That is, for quantum annealing which must be cooled to a point near absolute zero, the chip must be enclosed inside the cooler. The chip cannot be placed outside of the cooler for the purpose of expansions.

Finally, I will explain the relationship between interactions and scale. For example, if 1M-bit and 1M-bit are connected, the number of interactions will require 1T × the connected number of coefficient bits. When this happens, all the information cannot be stored on the RAM, but if it is stored on the HDD, we think that the processing speed will slow down. If this were to happen, our annealing machine would not be any better than conventional computer systems. However, because Hitachi’s machine focuses only on close interactions, we can have multiple parallel lines, making it easy to expand. We have actually demonstrated that we can expand a 100K-bit machine by creating a machine that lines up 25 4K-bit machines.

As part of a project which aims to further increase the size of the CMOS annealing machine, we are currently participating^*1 in a project run by the New Energy and Industrial Technology Development Organization (NEDO), and are engaged in research. This was also an opportunity we gained from our presentation at IISSCC. Moreover, I also started to receive invitations to give lectures from The Physical Society of Japan and The Japan Society of Applied Physics whom we were not well acquainted with, expanding my world as I had only conducted presentations at information systems conferences before, and rapidly expanding my network and the technology.

*1

Participated in Crosscutting Technology Development Project to Promote IoT, "Innovative Annealing Machine R&D for Combinatorial Optimization Processing"

Because it is important that our products are used by many people instead of being a single, new computer, we debated how we were going to develop a computer with people from other fields. This turning point accelerated the flow, and fortunately, I believe that many people began to share this purpose.

I am just one engineer, and my job is to work with machines on site. I hope to continue to hold "creating things" in high regard.

For me, the next step is to have many people use the CMOS annealing machine in practice. My hope is that the world might change because of the machine. First, we need to find places where it can be applied. For this to happen, I think that we need to create a machine while talking to people who are coming up with coming up with solutions in the real world. Conversely, I hope the mindset of the people who are creating the applications would change. My hope is to transform the way we have been thinking up until now and to get out of a mindset where we think a certain chip can only be applied to a certain area. I am anticipating proposals that we could never have thought of.

The next step for the machine itself is to ascertain how large we could make the machine. While we have discovered that we can make large enough hardware, I would like to confirm whether the machine would remain functional if we make it larger. We need to compensate for technology that lacks in this area. Moreover, conversations to decide upon performance benchmarks for annealing technology have begun among the developers, because we currently lack standards. I would like to clarify how well we could solve certain kinds of problems with certain aspects of the technology. I believe the machine’s development would accelerate if we could provide proper definitions.